Recent advances in system miniaturisation have led to the development of a multitude of new sophisticated multifunctional electronics. Efficient application of these devices to creating smart objects by embedding digital systems into materials is currently hampered by challenges posed by the system integration and packaging. High stresses induced by the embedded packaged systems are particularly detrimental to the host materials’ integrity and cause significant degradation and failure of the host material. This in turn affects the performance and reliability of the host materials and, ultimately, smart objects. Therefore, new packaging design solutions are required to ensure an unobtrusive low-stress integration of packaged electronic systems in materials and objects. This work approaches the challenge as a package-in-a-package problem; that is a packaged electronics system encapsulated into a host material. Through simulation and experiments, it investigates effects of embedded packages and their geometry on the bulk host materials.

The following design guidelines for low-stress integration of electronic systems into smart objects were established.

• choice of spherical or capsule-like shapes over cubic;
• optimisation of package size to minimise stresses;
• using “soft” buffer layer surrounding the package;
• optimal buffer thickness can be calculated using the equation;
• choosing spherical buffer with packages where a cubic node shape is unavoidable;
• “wiring off” strain gauges, and other components that need to be placed within the bulk material, out of the package and the buffer, if this is present.